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Cycle Per Instruction

См. также в других словарях:

  • Cycles per instruction — In computer architecture, cycles per instruction (aka clock cycles per instruction, clocks per instruction, or CPI) is a term used to describe one aspect of a processor s performance: the number of clock cycles that happen when an instruction is… …   Wikipedia

  • Cycles Per Instruction — In computer architecture, Cycles per instruction (clock cycles per instruction or clocks per instruction or CPI) is a term used to describe one aspect of a processor s performance: the number of clock cycles that happen when an instruction is… …   Wikipedia

  • Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… …   Wikipedia

  • Instructions Per Cycle — In computer architecture, Instructions Per Clock (Instruction Per Cycle or IPC) is a term used to describe one aspect of a processor s performance: the average number of instructions executed for each clock cycle. It is the multiplicative inverse …   Wikipedia

  • Very long instruction word — or VLIW refers to a CPU architecture designed to take advantage of instruction level parallelism (ILP). A processor that executes every instruction one after the other (i.e. a non pipelined scalar architecture) may use processor resources… …   Wikipedia

  • Instructions per cycle — Die Maßeinheit Instructions per Cycle (IPC) bezeichnet die Anzahl der von einem Prozessor in einem Taktzyklus ausführbaren Befehle. Es handelt sich in der Regel um einen Mittelwert, da die Anzahl der ausgeführten Befehle pro Taktzyklus bei den… …   Deutsch Wikipedia

  • Instructions per second — (IPS) is a measure of a computer s processor speed. Many reported IPS values have represented peak execution rates on artificial instruction sequences with few branches, whereas realistic workloads typically lead to significantly lower IPS values …   Wikipedia

  • Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… …   Wikipedia

  • Complex instruction set computing — A complex instruction set computer (CISC) (  /ˈsɪs …   Wikipedia

  • Explicitly parallel instruction computing — (EPIC) is a term coined in 1997 by the HP Intel alliance [cite web url = http://www.hpl.hp.com/techreports/1999/HPL 1999 111.pdf title = EPIC: An Architecture for Instruction Level Parallel Processors accessdate = 2008 05 08 last = Schlansker and …   Wikipedia

  • CPI — Consumer Price Index (Business » General) Consumer Price Index (Governmental » US Government) Consumer Price Index (Governmental » Transportation) Consumer Price Index (Business » Accounting) * Curioso Pero Inútil (International » Spanish) *… …   Abbreviations dictionary

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